From: Chris Duncan <chris@codecow.com>
Date: Thu, 1 Oct 2026 01:09:27 +0000 (-0700)
Subject: Rename variable.
X-Git-Url: https://git.codecow.com/?a=commitdiff_plain;h=4d58b8df8269ee48e13787bbb95da1c20cdad91f;p=nano25519.git

Rename variable.
---

diff --git a/src/assembly/ed25519/fe.ts b/src/assembly/ed25519/fe.ts
index 46dfba8..9e071de 100644
--- a/src/assembly/ed25519/fe.ts
+++ b/src/assembly/ed25519/fe.ts
@@ -303,32 +303,32 @@ export function fe_mul (h: FieldElement, f: FieldElement, g: FieldElement): void
 	const g89xx_19: v128 = i32x4.mul(g89xx, v19)
 
 	// f[0]
-	let fv: v128 = v128.load_splat<i32>(f_ptr, 0 << 2)
+	let f_i: v128 = v128.load_splat<i32>(f_ptr, 0 << 2)
 
-	let h01: v128 = i64x2.extmul_low_i32x4_s(fv, g0123)
-	let h23: v128 = i64x2.extmul_high_i32x4_s(fv, g0123)
-	let h45: v128 = i64x2.extmul_low_i32x4_s(fv, g4567)
-	let h67: v128 = i64x2.extmul_high_i32x4_s(fv, g4567)
-	let h89: v128 = i64x2.extmul_low_i32x4_s(fv, g89xx)
+	let h01: v128 = i64x2.extmul_low_i32x4_s(f_i, g0123)
+	let h23: v128 = i64x2.extmul_high_i32x4_s(f_i, g0123)
+	let h45: v128 = i64x2.extmul_low_i32x4_s(f_i, g4567)
+	let h67: v128 = i64x2.extmul_high_i32x4_s(f_i, g4567)
+	let h89: v128 = i64x2.extmul_low_i32x4_s(f_i, g89xx)
 
 	// f[1]
-	fv = v128.load_splat<i32>(f_ptr, 1 << 2)
-	fv = i32x4.add(fv, v128.and(fv, odds))
+	f_i = v128.load_splat<i32>(f_ptr, 1 << 2)
+	f_i = i32x4.add(f_i, v128.and(f_i, odds))
 
-	let h12: v128 = i64x2.extmul_low_i32x4_s(fv, g0123)
-	let h34: v128 = i64x2.extmul_high_i32x4_s(fv, g0123)
-	let h56: v128 = i64x2.extmul_low_i32x4_s(fv, g4567)
-	let h78: v128 = i64x2.extmul_high_i32x4_s(fv, g4567)
-	let h90: v128 = i64x2.extmul_low_i32x4_s(fv, v128.bitselect(g89xx, g89xx_19, m))
+	let h12: v128 = i64x2.extmul_low_i32x4_s(f_i, g0123)
+	let h34: v128 = i64x2.extmul_high_i32x4_s(f_i, g0123)
+	let h56: v128 = i64x2.extmul_low_i32x4_s(f_i, g4567)
+	let h78: v128 = i64x2.extmul_high_i32x4_s(f_i, g4567)
+	let h90: v128 = i64x2.extmul_low_i32x4_s(f_i, v128.bitselect(g89xx, g89xx_19, m))
 
 	// f[2]
-	fv = v128.load_splat<i32>(f_ptr, 2 << 2)
+	f_i = v128.load_splat<i32>(f_ptr, 2 << 2)
 
-	let t0: v128 = i64x2.extmul_low_i32x4_s(fv, g0123)
-	let t1: v128 = i64x2.extmul_high_i32x4_s(fv, g0123)
-	let t2: v128 = i64x2.extmul_low_i32x4_s(fv, g4567)
-	let t3: v128 = i64x2.extmul_high_i32x4_s(fv, g4567)
-	let t4: v128 = i64x2.extmul_low_i32x4_s(fv, g89xx_19)
+	let t0: v128 = i64x2.extmul_low_i32x4_s(f_i, g0123)
+	let t1: v128 = i64x2.extmul_high_i32x4_s(f_i, g0123)
+	let t2: v128 = i64x2.extmul_low_i32x4_s(f_i, g4567)
+	let t3: v128 = i64x2.extmul_high_i32x4_s(f_i, g4567)
+	let t4: v128 = i64x2.extmul_low_i32x4_s(f_i, g89xx_19)
 
 	h23 = i64x2.add(h23, t0)
 	h45 = i64x2.add(h45, t1)
@@ -337,14 +337,14 @@ export function fe_mul (h: FieldElement, f: FieldElement, g: FieldElement): void
 	h01 = i64x2.add(h01, t4)
 
 	// f[3]
-	fv = v128.load_splat<i32>(f_ptr, 3 << 2)
-	fv = i32x4.add(fv, v128.and(fv, odds))
+	f_i = v128.load_splat<i32>(f_ptr, 3 << 2)
+	f_i = i32x4.add(f_i, v128.and(f_i, odds))
 
-	t0 = i64x2.extmul_low_i32x4_s(fv, g0123)
-	t1 = i64x2.extmul_high_i32x4_s(fv, g0123)
-	t2 = i64x2.extmul_low_i32x4_s(fv, g4567)
-	t3 = i64x2.extmul_high_i32x4_s(fv, v128.bitselect(g4567, g4567_19, m))
-	t4 = i64x2.extmul_low_i32x4_s(fv, g89xx_19)
+	t0 = i64x2.extmul_low_i32x4_s(f_i, g0123)
+	t1 = i64x2.extmul_high_i32x4_s(f_i, g0123)
+	t2 = i64x2.extmul_low_i32x4_s(f_i, g4567)
+	t3 = i64x2.extmul_high_i32x4_s(f_i, v128.bitselect(g4567, g4567_19, m))
+	t4 = i64x2.extmul_low_i32x4_s(f_i, g89xx_19)
 
 	h34 = i64x2.add(h34, t0)
 	h56 = i64x2.add(h56, t1)
@@ -353,13 +353,13 @@ export function fe_mul (h: FieldElement, f: FieldElement, g: FieldElement): void
 	h12 = i64x2.add(h12, t4)
 
 	// f[4]
-	fv = v128.load_splat<i32>(f_ptr, 4 << 2)
+	f_i = v128.load_splat<i32>(f_ptr, 4 << 2)
 
-	t0 = i64x2.extmul_low_i32x4_s(fv, g0123)
-	t1 = i64x2.extmul_high_i32x4_s(fv, g0123)
-	t2 = i64x2.extmul_low_i32x4_s(fv, g4567)
-	t3 = i64x2.extmul_high_i32x4_s(fv, g4567_19)
-	t4 = i64x2.extmul_low_i32x4_s(fv, g89xx_19)
+	t0 = i64x2.extmul_low_i32x4_s(f_i, g0123)
+	t1 = i64x2.extmul_high_i32x4_s(f_i, g0123)
+	t2 = i64x2.extmul_low_i32x4_s(f_i, g4567)
+	t3 = i64x2.extmul_high_i32x4_s(f_i, g4567_19)
+	t4 = i64x2.extmul_low_i32x4_s(f_i, g89xx_19)
 
 	h45 = i64x2.add(h45, t0)
 	h67 = i64x2.add(h67, t1)
@@ -368,14 +368,14 @@ export function fe_mul (h: FieldElement, f: FieldElement, g: FieldElement): void
 	h23 = i64x2.add(h23, t4)
 
 	// f[5]
-	fv = v128.load_splat<i32>(f_ptr, 5 << 2)
-	fv = i32x4.add(fv, v128.and(fv, odds))
+	f_i = v128.load_splat<i32>(f_ptr, 5 << 2)
+	f_i = i32x4.add(f_i, v128.and(f_i, odds))
 
-	t0 = i64x2.extmul_low_i32x4_s(fv, g0123)
-	t1 = i64x2.extmul_high_i32x4_s(fv, g0123)
-	t2 = i64x2.extmul_low_i32x4_s(fv, v128.bitselect(g4567, g4567_19, m))
-	t3 = i64x2.extmul_high_i32x4_s(fv, g4567_19)
-	t4 = i64x2.extmul_low_i32x4_s(fv, g89xx_19)
+	t0 = i64x2.extmul_low_i32x4_s(f_i, g0123)
+	t1 = i64x2.extmul_high_i32x4_s(f_i, g0123)
+	t2 = i64x2.extmul_low_i32x4_s(f_i, v128.bitselect(g4567, g4567_19, m))
+	t3 = i64x2.extmul_high_i32x4_s(f_i, g4567_19)
+	t4 = i64x2.extmul_low_i32x4_s(f_i, g89xx_19)
 
 	h56 = i64x2.add(h56, t0)
 	h78 = i64x2.add(h78, t1)
@@ -384,13 +384,13 @@ export function fe_mul (h: FieldElement, f: FieldElement, g: FieldElement): void
 	h34 = i64x2.add(h34, t4)
 
 	// f[6]
-	fv = v128.load_splat<i32>(f_ptr, 6 << 2)
+	f_i = v128.load_splat<i32>(f_ptr, 6 << 2)
 
-	t0 = i64x2.extmul_low_i32x4_s(fv, g0123)
-	t1 = i64x2.extmul_high_i32x4_s(fv, g0123)
-	t2 = i64x2.extmul_low_i32x4_s(fv, g4567_19)
-	t3 = i64x2.extmul_high_i32x4_s(fv, g4567_19)
-	t4 = i64x2.extmul_low_i32x4_s(fv, g89xx_19)
+	t0 = i64x2.extmul_low_i32x4_s(f_i, g0123)
+	t1 = i64x2.extmul_high_i32x4_s(f_i, g0123)
+	t2 = i64x2.extmul_low_i32x4_s(f_i, g4567_19)
+	t3 = i64x2.extmul_high_i32x4_s(f_i, g4567_19)
+	t4 = i64x2.extmul_low_i32x4_s(f_i, g89xx_19)
 
 	h67 = i64x2.add(h67, t0)
 	h89 = i64x2.add(h89, t1)
@@ -399,14 +399,14 @@ export function fe_mul (h: FieldElement, f: FieldElement, g: FieldElement): void
 	h45 = i64x2.add(h45, t4)
 
 	// f[7]
-	fv = v128.load_splat<i32>(f_ptr, 7 << 2)
-	fv = i32x4.add(fv, v128.and(fv, odds))
+	f_i = v128.load_splat<i32>(f_ptr, 7 << 2)
+	f_i = i32x4.add(f_i, v128.and(f_i, odds))
 
-	t0 = i64x2.extmul_low_i32x4_s(fv, g0123)
-	t1 = i64x2.extmul_high_i32x4_s(fv, v128.bitselect(g0123, g0123_19, m))
-	t2 = i64x2.extmul_low_i32x4_s(fv, g4567_19)
-	t3 = i64x2.extmul_high_i32x4_s(fv, g4567_19)
-	t4 = i64x2.extmul_low_i32x4_s(fv, g89xx_19)
+	t0 = i64x2.extmul_low_i32x4_s(f_i, g0123)
+	t1 = i64x2.extmul_high_i32x4_s(f_i, v128.bitselect(g0123, g0123_19, m))
+	t2 = i64x2.extmul_low_i32x4_s(f_i, g4567_19)
+	t3 = i64x2.extmul_high_i32x4_s(f_i, g4567_19)
+	t4 = i64x2.extmul_low_i32x4_s(f_i, g89xx_19)
 
 	h78 = i64x2.add(h78, t0)
 	h90 = i64x2.add(h90, t1)
@@ -415,13 +415,13 @@ export function fe_mul (h: FieldElement, f: FieldElement, g: FieldElement): void
 	h56 = i64x2.add(h56, t4)
 
 	// f[8]
-	fv = v128.load_splat<i32>(f_ptr, 8 << 2)
+	f_i = v128.load_splat<i32>(f_ptr, 8 << 2)
 
-	t0 = i64x2.extmul_low_i32x4_s(fv, g0123)
-	t1 = i64x2.extmul_high_i32x4_s(fv, g0123_19)
-	t2 = i64x2.extmul_low_i32x4_s(fv, g4567_19)
-	t3 = i64x2.extmul_high_i32x4_s(fv, g4567_19)
-	t4 = i64x2.extmul_low_i32x4_s(fv, g89xx_19)
+	t0 = i64x2.extmul_low_i32x4_s(f_i, g0123)
+	t1 = i64x2.extmul_high_i32x4_s(f_i, g0123_19)
+	t2 = i64x2.extmul_low_i32x4_s(f_i, g4567_19)
+	t3 = i64x2.extmul_high_i32x4_s(f_i, g4567_19)
+	t4 = i64x2.extmul_low_i32x4_s(f_i, g89xx_19)
 
 	h89 = i64x2.add(h89, t0)
 	h01 = i64x2.add(h01, t1)
@@ -430,14 +430,14 @@ export function fe_mul (h: FieldElement, f: FieldElement, g: FieldElement): void
 	h67 = i64x2.add(h67, t4)
 
 	// f[9]
-	fv = v128.load_splat<i32>(f_ptr, 9 << 2)
-	fv = i32x4.add(fv, v128.and(fv, odds))
+	f_i = v128.load_splat<i32>(f_ptr, 9 << 2)
+	f_i = i32x4.add(f_i, v128.and(f_i, odds))
 
-	t0 = i64x2.extmul_low_i32x4_s(fv, v128.bitselect(g0123, g0123_19, m))
-	t1 = i64x2.extmul_high_i32x4_s(fv, g0123_19)
-	t2 = i64x2.extmul_low_i32x4_s(fv, g4567_19)
-	t3 = i64x2.extmul_high_i32x4_s(fv, g4567_19)
-	t4 = i64x2.extmul_low_i32x4_s(fv, g89xx_19)
+	t0 = i64x2.extmul_low_i32x4_s(f_i, v128.bitselect(g0123, g0123_19, m))
+	t1 = i64x2.extmul_high_i32x4_s(f_i, g0123_19)
+	t2 = i64x2.extmul_low_i32x4_s(f_i, g4567_19)
+	t3 = i64x2.extmul_high_i32x4_s(f_i, g4567_19)
+	t4 = i64x2.extmul_low_i32x4_s(f_i, g89xx_19)
 
 	h90 = i64x2.add(h90, t0)
 	h12 = i64x2.add(h12, t1)
@@ -457,7 +457,7 @@ export function fe_mul (h: FieldElement, f: FieldElement, g: FieldElement): void
 	let h8: i64 = i64x2.extract_lane(h78, 1) + i64x2.extract_lane(h89, 0)
 	let h9: i64 = i64x2.extract_lane(h89, 1) + i64x2.extract_lane(h90, 0)
 
-	// extract scalars from vectors during first carry
+	// reduce scalars with carry
 	let carry0: i64
 	let carry1: i64
 	let carry2: i64